Field
Aspects of the present disclosure relate to semiconductor devices, and more particularly to routing conductive layers, such as middle of line layers, within an integrated circuit.
Background
Interconnect layers often connect different devices together on an integrated circuit. Because of the increased density of circuits, the number of conductive layers has increased, and the routing of such layers has become more complex. Further, interconnect traces may not scale well as active device geometries decrease. Although higher density may be achievable, the increased resistance of smaller traces may degrade circuit performance.